Research



Graduate Research Activity

My research focuses on emerging applications and computer architecture. I am the author of the PARSEC Benchmark Suite.

Publications

2010
2009
2008

Patents

2008

Professional Activities

2010
2009
2008


Undergraduate Research Activity

I started very early to research, at the beginning of my second year as an undergraduate student. Since then I have authored several project reports and presentations. However, nothing was officially published. Therefore my undergraduate research results are presented in an informal way.

* April 2003 - September 2003: I worked on my master thesis "Design of a Chip for Digital X-ray Imaging". My task was to develop a chip called MPEC 3.0 which mainly consists of 32 x 32 pixels. Connected with an appropriate sensor material, each pixel is able to measure the electric current caused by the incident x-rays and thus determine the amount of radiation that has reached the sensor material in that area. Certain objects - like bones - which are located between the radiation source and the sensor can block the x-rays, resulting in a "shadow" which can be seen on the digital x-ray image later on.

Below you can see the layout of a pixel of MPEC 3.0.

Layout of a pixel of the chip which I designed.
 
 
* November 2002 - February 2003: I took part in a seminar about computer architecture and optoelectronics. The participation was mandatory for computer engineering students. I presented an introduction into compiler optimization techniques, during which I summarized some of the experience I had previously gained in Japan.  
 
* July 2002 - October 2002: I did a research internship at the Central Research Laboratories of English site NEC which are located in the Tokyo area. I already had substantial knowledge about compiler optimization techniques when I went to Japan, and I used it to optimize the Linpack Benchmark program. The internship was very successful, and at the end of the three months I had achieved a new speed world record for Pentium III systems.
I worked in the High-Performance Computing Group, and it was the first time that I could work as a full-time scientist over a longer period. I gained a lot through this internship: The Japanese scientists showed me how to do focused and concentrated research on a high level. Interestingly only months before, the Earth Simulator was finished by NEC, which became the world's most powerful supercomputer by far. I could visit it at the end of my stay, and I have put some Another section private photos of the supercomputer online. The compilers for the Earth Simulator were written by the research group I had joined over the summer.
It was a great honor that I was accepted by such a top research team.
NEC Logo
 
* April 2002 - July 2002: By that time I already had gathered some knowledge about low-level optimizations and parallel computing. I was assigned to a project that was sponsored by the German site DFG. Considering my limited research experience at that time, that was a huge honor and a significant step forward for me. The project was pretty big and incorporated several research groups. It was supervised by the English site CVGPR Group of the University of Mannheim. Basically, the goal was to implement an isotropic nonlinear diffusion filtering on clusters. My task was the optimization of the local memory access pattern and the parallelization with threads to be able to fully exploit the multi-processor nodes of clusters.
At the end I had the chance to test the program on English site HELICS, the Heidelberg Linux Cluster System, which was brand-new and the world's most powerful Linux cluster at that time.
CVGPR Group Logo
 
* October 2001 - March 2002: My first research project was at the English site Chair of Computer Architecture of the University of Mannheim. I designed a basic program that used the time-stamp counter to measure the latency of memory references. The idea was to analyze the execution speed of a sufficiently complex and suitably structured reference pattern to determine the exact structure and speed of the memory hierarchy. The program I wrote might serve as a basis for a future benchmark suite of the University of Mannheim. Computer Architecture Group Logo